The present invention relates to a process for the autopositioning of a local field oxide with respect to an insulating trench.
This process can be used in the field of microelectronics, whenever it is necessary to insulate from one another the components of a circuit (transistors, diodes, etc.), produced on a semiconductor support. Thus, it more particularly applies to integrated circuits using silicon as the substrate, such as bipolar, CMOS, or MOS integrated circuits.
Attempts to achieve a high integration density in this type of circuit and more particularly in the case of CMOS integrated circuits calls for a special insulating procedure between the different components of these circuits, and particularly between type N and type P transistors, when it is wished to reduce the distance between these complementary transistors.
One of the recent insulating procedures used with this aim in mind is based on the formation of an insulating trench in a semiconductor substrate, surmounted by a local field oxide. FIGS. 1 and 2 show the different stages of such an insulating procedure.
The first stage thereof, as shown in FIG. 1, consists of depositing on a monocrystalline silicon substrate 2 a silicon oxide coating 4 having a thickness of approximately 1 micron. After producing a resin mask 6, the oxide coating 4 is anisotropically etched until a region of the substrate in which the trench will be formed is exposed. The use of anisotropic etching means that the oxide coating 4 only has to be etched in a single direction in space.
Following the elimination of the mask 6, trenches 8 are opened in substrate 2 by etching several microns of the substrate, e.g. 5 .mu.m, with the aid of anisotropic etching. This is followed by the chemical elimination of the oxide coating 4. The thus formed trench 8 is then the thermally oxidized so that it has, as shown in FIG. 2, insulating edges 10 and is then filled with a material 12 such as polycrystalline silicon.
This filling takes place by the deposition of material 12, generally using a vapour phase chemical deposition process, followed by the removal of the excess thereof located outside trench 8. The local field oxide can then be formed on the thus obtained insulating trench.
For this purpose, substrate 2 and the silicon material 12 are firstly thermally oxidized in order to obtain a silicon oxide film 14 with a thickness of 200 to 500 .ANG., which is followed by the deposition of a silicon nitride coating 16, particularly by a vapour phase chemical deposition process. Then, after positioning a not shown mask on nitride coating 16 with respect to the insulating trench 8, dry or wet chemical etching of the nitride coating takes place. This is followed by thick thermal oxidation in the regions where the nitride coating 16 has been etched. This procedure consisting of forming a field oxide by local oxidation from generally silicon nitride patterns is known as LOCOS technology. After forming the field oxide, the nitride coating 16 is eliminated, e.g. chemically.
This process makes it possible to obtain a good insulation in depth, as well as a good surface insulation, particularly between type N MOS transistors and type P CMOS circuits. However, this process limits the integration density of the integrated circuits using said insulating procedure. This limitation is mainly due to the fact that the local field oxide is not autopositioned or altoaligned with respect to the corresponding insulating trench.